Does qwenGPU compile a SIMT GPU into Qwen3.5-2B weights that execute CUDA?
ReportedLast checked
qwenGPUFirst seen
Verdict
MarkTechPost covers the demo; primary repo/paper not re-opened in this run.
Evidence timeline · 1 source · newest first
Unconfirmed → Reported
Reported
MarkTechPost reports qwenGPU embeds a 4-lane SIMT GPU as 45 compiled layers inside Qwen3.5-2B weights so the model writes real CUDA launch steps, using Gated DeltaNet state as registers and memory. Primary qwenGPU repo/paper was not re-opened in this run.